As the integration of semiconductor (i.e., integrated circuit) devices increases, isolation technology for electrically isolating adjacent devices has become more important. A shallow trench isolation (STI) formation process has been widely used as an isolation technology in manufacturing processes of high integration semiconductor devices. Various scaling technologies for manufacturing highly integrated semiconductor devices have been developed. Also, as a feature size of semiconductor devices becomes smaller, it may become more difficult to form STI structures for isolation.
Various isolation processes using STI have been suggested. In an example of a conventional isolation processes, a trench is formed in a substrate by using a nitride layer pattern, which is formed on the substrate, as an etching mask. A nitride liner is formed in the trench, and then an isolation layer is formed by filling an insulating material thereon. Then, a wet etching process is performed to remove the nitride layer pattern on the substrate. However, the nitride liner exposed near an upper edge of the trench may be consumed to a predetermined depth from an upper surface of the substrate, such that a dent is formed near the upper edge of the trench. This may adversely impact device properties.